专利名称：Method for selectively transferring data
instructions to a cache memory
发明人：J. Herschel Shermis申请号：US07/618698申请日：19901127公开号：US05226138A公开日：19930706
摘要：A cache controller is coupled between a central processing unit (CPU) and amemory management unit (MMU). The MMU is coupled to main memory, and the cachecontroller is further coupled to a cache memory. A cache controller transfers a block ofN programming instructions from the main memory into the cache memory. Once thistransfer is complete, the CPU begins the sequential execution of the N instructions.Generally concurrently, the cache controller scans each of the N instructions to detectbranch instructions. Branch instructions are those instructions which require additionaldata not found within the block of N instructions previously loaded into the cache. Upondetection a branch instruction, and prior to the execution of the branch instruction by theCPU, the cache controller fetches the branch instruction data from main memory, andstores it within the cache.
申请人：SUN MICROSYSTEMS, INC.
代理机构：Blakely Sokoloff Taylor & Zafman
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